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general description the MAX4864L/max4865l/max4866l/max4867/ max4865/max4866 overvoltage protection controllers protect low-voltage systems against high-voltage faults up to +28v, and negative voltages down to -28v. these devices drive a low-cost complementary mosfet. if the input voltage exceeds the overvoltage threshold, these devices turn off the n-channel mosfet to prevent dam- age to the protected components. if the input voltage drops below ground, the devices turn off the p-channel mosfet to prevent damage to the protected compo- nents. an internal charge pump eliminates the need for external capacitors and drives the mosfet gaten for a simple, robust solution. the overvoltage thresholds are preset to +7.4v (MAX4864L), +6.35v (max4865l), +5.8v (max4866l), and +4.65v (max4867). when the input voltage drops below the undervoltage lockout (uvlo) threshold, the devices enter a low-current standby mode (8.5?). also in shutdown ( en set to logic-high), the current is reduced fur- ther (0.4?). the MAX4864L/max4865l/max4866l have a +2.85v uvlo threshold, and the max4867 has a +2.5v uvlo threshold. the max4865/max4866 have a 4.15v uvlo threshold. in addition, a ?5kv esd protection is provided to the input when bypassed with a 1f capacitor to ground. all devices are offered in a small 6-pin sot23 and a 6-pin, 2mm x 2mm ?fn package, and are specified for operation over the -40? to +85? temperature range. applications features ? overvoltage protection up to +28v ? reverse polarity protection down to -28v ? preset overvoltage (ov) trip level (7.4v, 6.35v, 5.8v, 4.65v) ? drive low-cost complementary mosfet ? internal 50ms startup delay ? internal charge pump ? 8.5a standby current (in uvlo mode) ? 0.4a shutdown current ? overvoltage fault flag indicator ? 6-pin (2mm x 2mm) dfn and 6-pin sot23 packages MAX4864L/max4865l/max4866l/max4867/max4865/max 4866 overvoltage protection controllers with reverse polarity protection ________________________________________________________________ maxim integrated products 1 19-3582; rev 1; 5/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information pa r t pin - pa c k a g e ov t rip level ( v ) top mark pkg code m a x4 8 6 4 l e u t- t 6 s ot23- 6 7.40 abvo m ax 4 864le lt 6 ? fn 7.40 aae l622-1 m a x4 8 6 5 l e u t- t 6 s ot23- 6 6.35 abvp m ax 4 865le lt 6 ? fn 6.35 aaf l622-1 m a x4 8 6 6 l e u t- t 6 s ot23- 6 5.80 abvq m ax 4 866le lt 6 ? fn 5.80 aag l622-1 m a x4 8 6 7 e u t- t 6 s ot23- 6 4.65 abvn m ax 4867e lt 6 ? fn 4.65 aad l622-1 functional diagram appears at end of data sheet. note: all devices are specified over the -40? to +85? operating range. adapter (-28v to +28v) output v io in flag gaten 1 f gnd en gatep MAX4864L max4865l max4866l max4867 pn t ypical operating circuit pin configurations gnd gaten flag 16en 5 gatep in MAX4864L max4865l max4866l max4867 sot23 top view 2 34 flag en in gaten gatep gnd MAX4864L max4865l max4866l max4867 dfn 1 2 3 6 5 4 cell phones digital still cameras pdas and palmtop devices mp3 players datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in to gnd ..............................................................-0.3v to +30v gaten, gatep to gnd ........................................-0.3v to +12v in to gatep ...........................................................-0.3v to +20v flag, en to gnd ....................................................-0.3v to +6v continuous power dissipation (t a = +70?) 6-pin ?fn (2mm x 2mm) (derate 2.1mw/? above +70?) ..............................................................168mw 6-pin sot23 (derate 8.7mw/? above +70?)............696mw operating temperature range ..........................-40? to +85? junction temperature .................................................... +150? storage temperature range ............................-65? to +150? lead temperature (soldering, 10s) ................................+300? electrical characteristics (v in = +5v (MAX4864L/max4865l/max4866l), v in = +4v (max4867), t a = -40? to +85?, c gaten = 500pf, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units input voltage range v in 1.2 28.0 v MAX4864L 7.0 7.4 7.8 max4865l 5.95 6.35 6.75 max4866l 5.45 5.8 6.15 overvoltage trip level ovlo v in rising max4867 4.35 4.65 4.95 v MAX4864L 75 max4865l 65 max4866l 55 overvoltage lockout hysteresis max4867 50 mv MAX4864L/max4865l/max4866l 2.65 2.85 3.05 undervoltage lockout threshold uvlo v in falling max4867 2.3 2.5 2.7 v MAX4864L/max4865l/max4866l 44 undervoltage lockout hysteresis max4867 25 mv MAX4864L/max4865l/max4866l 77 120 in supply current i in en = gnd max4867 68 110 ? MAX4864L/max4865l/max4866l, v in = +2.6v 8.5 22 uvlo supply current i uvlo en = gnd max4867, v in = +2.2v 8 18 ? MAX4864L/max4865l/max4866l, v in = 3.6v 0.4 2 shutdown supply current i shd en = 1.6v max4867, v in = 3.6v 0.4 2 ? MAX4864L/max4865l/max4866l 9 9.83 10 gaten voltage v gaten 1? load max4867 7.5 7.85 8.0 v gaten pulldown current i pd v in > ovlo, v gaten = +5.5v 12 32 65 ma gatep clamp voltage v clamp 13.5 16.5 19.5 v gatep pulldown resistor r gatep 32 48 64 k ? flag output-low voltage v ol i sink = 1ma 0.4 v flag leakage current v flag = +5.5v 1 a en input-high voltage v ih 1.5 v en input-low voltage v il 0.4 v datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = +5v (MAX4864L/max4865l/max4866l), v in = +4v (max4867), t a = -40? to +85?, c gaten = 500pf, unless otherwise noted. typical values are at t a = +25?.) (note 1) parameter symbol conditions min typ max units en input leakage current i lkg en = gnd or +5.5v 1 a timing startup delay t start v in > uvlo to v gaten > 0.3v, figure 1 20 50 80 ms flag blanking time t blank v gaten > 0.3v to v flag < 0.3v, figure 1 20 50 80 ms gaten turn-on time t gon c gaten = 500pf, v gaten = 0.3v to +8v ( MAX4864L/max4865l/max4866l) v gaten = 0.3v to +7v (max4867), figure 1 10 ms gaten turn-off time t goff v i n r i si ng at 3v /s fr om + 5v to + 8v ( m ax 4864l/m ax 4865l/m ax 4866l) , or fr om + 4v to + 7v ( m ax 4867) v gat e n = 0.3v , c gat e n = 500p f, fi g ur e 2 720s flag assertion delay t flag v in rising at 3v/? from 5v to 8v ( m ax 4864l/m ax 4865l/m ax 4866l) , or from +4v to +7v (max4867), v flag = 0.3v, figure 2 3.5 ? initial overvoltage fault delay t ovp v in rising at 3v/? from 0v to +9v, time from v in = 5v to i gaten = 80% of i pd (gaten pulldown current), figure 3 1.5 ? disable time t dis v en = +2.4v, v gaten = 0.3v, figure 4 2 ? note 1: all parts are 100% tested at +25?. electrical limits across the full temperature range are guaranteed by design and correlatio n. v gaten v en +0.3v +2.4v t dis figure 4. disable timing diagram v in v uvlo t gon t start v gaten v flag t blank +0.3v +8v (+7v)* *max4867 +5v +0.3v figure 1. startup timing diagram v in v ovlo v gaten v flag t flag t goff +0.3v +0.3v +5v figure 2. shutdown timing diagram v in v ovlo t ovp i gaten 80% 0v figure 3. power-up overvoltage timing diagram datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection 4 _______________________________________________________________________________________ t ypical operating characteristics (t a = +25?, unless otherwise noted.) t ypical operating characteristics (t a = +25?, unless otherwise noted.) supply current vs. supply voltage (MAX4864L) max4864 toc01 supply voltage (v) supply current ( a) 25 20 15 10 5 50 100 150 200 250 300 350 0 030 reverse current vs. output voltage (MAX4864L) max4864 toc02 output voltage (v) reverse current ( a) 4 3 2 1 0.1 0.2 0.3 0.4 0 05 en = 3v reverse current vs. output voltage (MAX4864L) max4864 toc03 output voltage (v) reverse current ( a) 4 3 2 1 20 40 60 80 0 05 en = 0v device turns on at transition MAX4864L/max4865l/max4866l gaten voltage vs. input voltage max4864 toc04 input voltage (v) gaten voltage (v) 6 4 2 3 6 9 12 15 0 08 MAX4864L max4865l max4866l max4867 gaten voltage vs. input voltage max4864 toc05 input voltage (v) gaten voltage (v) 6 4 2 3 6 9 12 15 0 08 max4867 power-up response max4864 toc06 20ms/div 10v 0v 5v 0v in gaten flag 5v 0v adapter 5v 0v power-up response max4864 toc07 in 5v/div flag 5v/div out 5v/div adapter 5v/div 20ms/div iin 1a/div overvoltage response max4864 toc08 in flag 5v/div gaten 5v/div adapter 2 s/div i gaten 10ma/div 5v 8v 5v 8v datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection _______________________________________________________________________________________ 5 power-up overvoltage response max4864 toc09 in flag gaten adapter 20ms/div 8v 0v 8v 0v 5v 0v 0v negative voltage response max4864 toc10 gatep flag in adapter 20ms/div 0v 0v 5v 0v 5v 0v pin MAX4864Leut/ max4865leut/ max4866leut/ max4867eut MAX4864Lelt/ max4865lelt/ max4866lelt/ max4867elt name function 13 in voltage input. in is both the power-supply input and the overvoltage sense input. 21 gnd ground 32 flag faul t- ind i cati on outp ut. when e n g oes hi g h, flag b ecom es hi g h- i m p ed ance. flag i s asser ted hi g h d ur i ng und er vol tag e l ockout and over vol tag e l ockout cond i ti ons. flag i s d easser ted d ur i ng nor m al op er ati on. flag i s an op en- d r ai n outp ut. 46 gaten n-channel mosfet gate-drive output. gaten is the output of an on-chip charge pump. when v uvlo < v in < v ovlo , gaten is driven high to turn on the external n-channel mosfet. 55 gatep p-channel mosfet gate-drive output. gatep is always on when input is above ground and off when input drops below ground. 64 en active-low enable input. connect to ground in normal operation. drive en high to disable device and enter shutdown mode. pin description t ypical operating characteristics (continued) (t a = +25?, unless otherwise noted.) datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection 6 _______________________________________________________________________________________ detailed description the MAX4864L/max4865l/max4866l/max4867 provide up to +28v overvoltage and negative voltage protection for low voltage systems. when the input voltage exceeds the overvoltage trip level, the MAX4864L/max4865l/ max4866l/max4867 turn off a low-cost external n-channel mosfet to prevent damage to the protected compo- nents. the devices also drive an external p-channel mosfet to protect against negative voltage inputs. an internal charge-pump (see the functional diagram ), drives the mosfet gaten for a simple, robust solution. on power-up, the device waits for 50ms before driving gaten high. the open-drain flag output is kept at a high impedance for an additional 50ms after gaten goes high before deasserting. the flag output asserts high immediately to an overvoltage fault. undervoltage lockout (uvlo) the MAX4864L/max4865l/max4866l/max4867 have a fixed +2.85v typical uvlo level, and the max4867 has +2.5v uvlo level. when v in is less than the uvlo, the gaten driver is held low and flag is asserted. overvoltage lockout (ovlo) the MAX4864L has a +7.4v typical ovlo threshold; the max4865l has +6.35v typical ovlo threshold; the max4866l has a +5.8v typical ovlo threshold; and the max4867 has a +4.65v typical ovlo threshold. when v in is greater than ovlo, the gaten driver is held low and flag is asserted. flag output the open-drain flag output is used to signal to the host system when there is a fault with the input voltage. on power-up, flag is held high for 50ms after gaten turns on, before deasserting. flag asserts immediately to overvoltage and undervoltage faults. when the fault condition is removed, flag deasserts 50ms after gaten turns on. connect a pullup resistor from flag to the logic i/o voltage of the host system. gaten driver an on-chip charge pump is used to drive gaten above in, allowing the use of a low-cost n-channel mosfet. the charge pump operates from the internal +5.5v regulator. the actual gaten output voltage tracks approximately two times v in until v in exceeds +5.5v, or the ovlo trip level is exceeded, whichever comes first. the MAX4864L has a +7.4v typical ovlo, therefore gaten remains relatively constant at approximately +10.5v for +5.5v < v in < +7.4v. the max4866l has a +5.8v typi- cal ovlo, but this can be as low as +5.5v. the gaten output voltage is a function of input voltage, as shown in the typical operating characteristics . gatep driver when the input voltage drops below ground, gatep goes high turning the external p-channel mosfet off. when the input voltage goes above ground, gatep pulls low and turns on the p-channel mosfet. an inter- nal clamp protects the p-channel mosfet by insuring that the gatep-to-in voltage does not exceed +16v when the input (in) rises to +28v. device operation the MAX4864L/max4865l/max4866l/max4867 have an on-board state machine to control device operation. a flowchart is shown in figure 5 . on initial power-up, if v in < uvlo or if v in > ovlo, gaten is held at 0v and flag is high. if uvlo < v in < ovlo, the device enters startup after a 50ms internal delay. the internal charge pump is enabled, and gaten begins to be driven above v in by the internal charge pump. flag is held high during startup until the flag blanking period expires, typically 50ms after the gaten starts going high. at this point, the device is in its on-state. at any time if v in drops below uvlo, flag is driven high and gaten is driven to ground. standby gaten = 0 flag = high timer starts counting v in > uvlo v in < uvlo v in > ovlo v in > ovlo ovlo check gaten = 0 flag = high startup gaten driven high flag = high on gaten high flag = low t = 50ms t = 50ms figure 5. state diagram datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection _______________________________________________________________________________________ 7 applications information mosfet configuration the MAX4864L/max4865l/max4866l/max4867 can be used with either a complementary mosfet configuration as shown in the typical operating circuit , or can be con- figured with a single p-channel mosfet and back-to- back n-channel mosfets as shown in figure 6 . the MAX4864L/max4865l/max4866l/max4867 can drive either a complementary mosfet or a single p-channel mosfet and back-to-back n-channel mosfets. the back-to-back configuration has almost zero reverse cur- rent when the adapter is not present or when the adapter voltage is below the uvlo threshold. if reverse current leakage is not a concern, a single mosfet can be used. this approach has half the loss of the back-to-back configuration when used with simi- lar mosfet types and is a lower cost solution. note that if the input is actually pulled low, the output will also be pulled low due to the parasitic body diode in the mosfet. if this is a concern, then the back-to-back configuration should be used. mosfet selection the MAX4864L/max4865l/max4866l/max4867 are designed for use with a complementary mosfet or sin- gle p-channel and dual back-to-back n-channel mosfets. in most situations, mosfets with rds(on) specified for a vgs of 4.5v work well. also the v ds should be +30v for the mosfet to withstand the full +28v in range of the MAX4864L/max4865l/ max4866l/max4867. table 1 shows a selection of mosfets which are appropriate for use with the MAX4864L/max4865l/max4866l/max4867. in bypass considerations for most applications, bypass adapter to gnd with a 1? ceramic capacitor. if the power source has signifi- cant inductance due to long lead length, take care to prevent overshoots due to the lc tank circuit and pro- vide protection if necessary to prevent exceeding the +30v absolute maximum rating on in. esd test conditions esd performance depends on a number of conditions. the MAX4864L/max4865l/max4866l/max4867 are specified for +/-15kv typical esd resistance on in when adapter is bypassed to ground with a 1f ceramic capacitor. human body model figure 7 shows the human body model, and figure 8 shows the current waveform it generates when dis- charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of interest, which is then discharged into the device through a 1.5k ? resistor. p nn adapter -28v to +28v output v io in flag gaten 1 f gnd gatep MAX4864L max4865l max4866l max4867 figure 6. back-to-back external mosfet configuration table 1. mosfet suggestions part configuration/ package v gs max (v) v ds max (v) r on at 4.5v (m ? ) manufacturer +30 143 (n-mosfet) si5504dc complementary mosfet/1206-8 ?0 -30 290 (p-mosfet) si5902dc dual/1206-8 ?0 +30 143 (n-mosfet) si1426dh single/?fn-6 ?0 +30 115 (n-mosfet) si5435dc single/1206-8 ?0 -30 80 (p-mosfet) vishay siliconix fdc6561an dual/ssot-6 ?0 +30 145 (n-mosfet) fdg315n single/?fn-6 ?0 +30 160 (n-mosfet) fdc658p single/ssot-6 ?0 -30 75 (p-mosfet) fdc654p single/ssot-6 ?0 -30 125 (p-mosfet) fairchild semiconductor datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection 8 _______________________________________________________________________________________ iec 1000-4-2 since january 1996, all equipment manufactured and/or sold in the european union has been required to meet the stringent iec 1000-4-2 specification. the iec 1000-4-2 standard covers esd testing and perfor- mance of finished equipment. it does not specifically refer to ics. the MAX4864L/max4865l/max4866l/ max4867 help users design equipment that meets level 3 of iec 1000-4-2, without additional esd-protec- tion components. the main difference between tests done using the human body model and iec 1000-4-2 is higher peak current in iec 1000-4-2. because series resistance is lower in the iec 1000-4-2 esd test model ( figure 9 ), the esd-withstand voltage measured to this standard is gen- erally lower than that measured using the human body model. figure 10 shows the current waveform for the ?kv iec 1000-4-2 level 4 esd contact discharge test. the air-gap test involves approaching the device with a charger probe. the contact discharge method connects the probe to the device before the probe is energized. chip information transistor count: 727 process technology: bicmos charge-current limit resistor discharge resistance storage capacitor c s 100pf r c 1m ? r d 1.5 ? high- voltage dc source device under test figure 7. human body esd test model i p 100% 90% 36.8% t ri time t dl current waveform peak-to-peak ringing (not drawn to scale) i r 10% 0 0 amperes figure 8. human body current waveform t r = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% i peak i figure 10. iec 1000-4-2 esd generator current waveform charge-current limit resistor discharge resistance storage capacitor c s 150pf r c 50 ? to 100 ? r d 330 ? high- voltage dc source device under test figure 9. iec 1000-4-2 esd test model datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection _______________________________________________________________________________________ 9 pn adapter output v io in flag gaten gnd en gatep MAX4864L max4865l max4866l max4867 +15v clamp +5.5v regulator uvlo and ovlo detector 2x charge pump control logic and timer gate driver functional diagram datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection 10 ______________________________________________________________________________________ 6, 8, 10l udfn.eps even terminal l c odd terminal l c l e l a e e d pin 1 index area b e a b n solder mask coverage a a 1 pin 1 0.10x45 l l1 (n/2 -1) x e) xxxx xxxx xxxx sample marking a1 a2 7 a 1 2 21-0164 package outline, 6, 8, 10l udfn, 2x2x0.80 mm -drawing not to scale- package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection ______________________________________________________________________________________ 11 common dimensions symbol min. nom. a 0.70 0.75 a1 d 1.95 2.00 e 1.95 2.00 l 0.30 0.40 pkg. code n e b package variations l1 6 l622-1 0.65 bsc 0.300.05 0.250.05 0.50 bsc 8 l822-1 0.200.03 0.40 bsc 10 l1022-1 2.05 0.80 max. 0.50 2.05 0.10 ref. (n/2 -1) x e 1.60 ref. 1.50 ref. 1.30 ref. a2 - -drawing not to scale- a 2 2 21-0164 package outline, 6, 8, 10l udfn, 2x2x0.80 mm 0.15 0.20 0.25 0.020 0.025 0.035 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) datasheet.in
MAX4864L/max4865l/max4866l/max4867 overvoltage protection controllers with reverse polarity protection maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. 6lsot.eps package outline, sot 6l body 21-0058 1 1 g package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) datasheet.in

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